The number that matters is not 50%. It is 4%. Huawei is projected to command roughly half of China's AI chip market in 2026. Domestically, that looks like dominance. Globally, it is noise. The Council on Foreign Relations estimates Huawei's total AI compute output will reach only 4% of Nvidia's this year. That gap is not a marketing problem. It is a physics problem, written in the yield curves of SMIC's DUV lithography and the empty shelves where EUV machines should be.
I spent the last week tracing the supply chain math behind this divergence. The story is not about a single heroic chip design. It is about a structural ceiling. And the most interesting part is that the ceiling is not where most analysts are looking. They are staring at the wafer fab. The real bottleneck is a few steps downstream, in the packaging houses and the HBM stacks.
The Yield Ceiling: Why SMIC's 7nm is a Different Animal
First, establish the baseline. Huawei's Ascend 910C and the newer 950 series are built on SMIC's N+2 process, a 7nm-class node. This is not the 7nm that TSMC perfected. It is a 7nm achieved through DUV multi-patterning, a technique that requires multiple exposures to define features that EUV would handle in a single pass. The result is a yield curve that is brutally unforgiving.
Industry data cited in the report puts SMIC's N+2 yield at 20-40%. TSMC's mature N7 process runs above 90%. This is not a minor delta. It is the difference between a chip that costs $1,000 to manufacture and one that costs $3,000 to $5,000. The low yield is not a temporary blip. It is a function of the toolset. Without EUV, every additional layer of multi-patterning introduces more defect opportunities. The process is fighting physics, and physics is winning.
Huawei's response is telling. The 950PR and 950DT have lower theoretical peak performance per chip than the 910C. This is not a regression. It is a strategic pivot from single-chip performance to total shippable compute. Under a yield ceiling, the rational move is to design smaller dies that have a higher chance of surviving the lithography gauntlet. More, smaller chips. Not one giant, expensive failure. This is the kind of structural design philosophy that only emerges when you are forced to operate within a hard constraint.
The Hidden Inventory: The TSMC Windfall is Over
The report contains a detail that changes the entire narrative of Huawei's recent past. Between 2024 and 2025, Huawei shipped approximately 805,000 Ascend chips, including the 910B and 910C variants. But a significant portion of those chips were not made by SMIC. They were made by TSMC.
Through a shell company named Sophgo, Huawei secured roughly 2.9 million 7nm Ascend dies fabricated by TSMC before the sanctions tightened. This inventory acted as a bridge. It allowed Huawei to claim a "domestic" supply chain while actually relying on the world's best foundry. By early 2026, that inventory is nearly exhausted.
Trace the invariant where the logic fractures. The 2024-2025 success story was built on a foundation that no longer exists. Starting in 2026, every Ascend chip shipped must come from SMIC's fabs. The yield problem is no longer an abstract concern. It is the binding constraint on Huawei's entire production forecast.
This is the hidden dependency that the market is only beginning to price in. The shift from TSMC's mature 7nm to SMIC's struggling N+2 is not a like-for-like swap. It is a downgrade in manufacturing capability that will ripple through every downstream metric: cost, performance, and volume.
HBM: The True Supply Chain Chokepoint
While the wafer fab gets most of the attention, the report identifies a more immediate constraint: High Bandwidth Memory. SMIC's theoretical capacity could support over one million Ascend chips per year. But those chips are useless without HBM stacks.
CXMT, China's primary HBM hope, is projected to produce only about 2 million stacks in 2026. That is enough for roughly 250,000 to 300,000 Ascend 910C-class chips. Even if SMIC delivers the wafers, Huawei cannot package them into finished accelerators without memory.
This is not a hypothetical risk. The report rates the probability of an HBM supply shortfall at 60-70%. The gap between the 1.6 million die target and the HBM-limited output is a chasm. Huawei's own 950PR does include 128GB of self-developed HBM, but the production volume for that memory is not disclosed. The assumption that domestic HBM can fill the gap is speculative at best.
Metadata is memory, but code is truth. In the chip world, memory is the physical manifestation of that truth. Without enough HBM, the entire AI compute narrative collapses.
The Pricing Paradox: Profit at One-Third the Cost
Huawei's pricing strategy is a masterclass in constraint-driven economics. The 950PR is priced at approximately RMB 70,000, or about $9,600. That is less than one-third the price of an Nvidia H200, which sells for around RMB 250,000. Despite this aggressive pricing, Huawei has reportedly achieved profitability on the Ascend 910C once yields hit 40%.
This is counter-intuitive. Low yields and low prices typically mean losses. The resolution lies in system-level integration. Huawei is not selling a chip. It is selling a SuperPod. The Atlas 950 SuperPod connects 8,192 Ascend chips in a single cluster, claiming 8 EFLOPS of FP8 compute. This system-level approach allows Huawei to amortize the cost of low-yield dies across a high-margin integrated solution.
Friction reveals the hidden dependencies. The "profitability" is real, but it is fragile. It depends on continued system-level innovation and on the absence of a viable Nvidia alternative in the Chinese market. If H200s flood in, the pricing calculus collapses.
The Contrarian Angle: The H200 Threat is Overstated, But Not for the Reasons You Think
Most analysis of the H200 export relaxation focuses on the immediate competitive threat. The report cites a CFR estimate that 3 million H200s would provide China with more AI compute than its domestic chips could generate through 2028-2029. This is the bear case for Huawei's market position.
But the contrarian angle is different. The H200 export approval is not a done deal. As of September 2026, the regulatory situation remains in limbo. The US Commerce Department has not issued final licenses. The political calculus is uncertain, especially with an election cycle underway.
More importantly, the threat is not just about chip performance. It is about ecosystem lock-in. Huawei's CANN software stack, open-sourced in August 2025, now has over 4 million developers. DeepSeek V4, the most influential Chinese AI model, is specifically optimized for Ascend hardware. This creates a switching cost that is not captured in simple chip comparisons.
If H200s enter the market, they will compete on raw performance. But they will not have the software integration that Huawei has built. The abstraction leaks, and we measure the loss. Nvidia's CUDA ecosystem is powerful, but in China, it has been effectively banned. The domestic stack, despite its limitations, is the only one that works seamlessly with local models.
The real risk is not H200s. It is the psychological shift. If Chinese tech giants believe that Nvidia is coming back, they may delay long-term commitments to Ascend. This hesitation alone could throttle Huawei's growth momentum.
The Customer Concentration Trap
ByteDance is the elephant in the room. In 2026, ByteDance's orders for Ascend chips exceed $5.6 billion, representing nearly half of Huawei's expected $12 billion AI chip revenue. This is not a diversified customer base. It is a single point of failure.
If ByteDance decides to design its own chips, or if it shifts to Cambricon or Alibaba's Pingtouge, Huawei's revenue could drop by 30-50%. The report rates this risk at 30-40% probability. The mitigation is the CANN ecosystem and the DeepSeek partnership, but these are soft moats. A determined customer with sufficient engineering resources can overcome them.
Precision is the only reliable currency. The precision here is the exact percentage of revenue concentrated in a single customer. The numbers are stark. The market is not pricing this concentration risk because it assumes ByteDance has no alternative. That assumption is false.
The Roadmap: 2027 is the Real Test
Huawei's roadmap is ambitious: the Ascend 960 in Q4 2027, followed by the Ascend 970 in Q4 2028. The CFR analysis suggests Huawei may reach or exceed H200-level performance by late 2027 or early 2028. By then, Nvidia will be on the Rubin Ultra platform.
Reverting to first principles to find the break. The fundamental issue is not the pace of innovation. It is the pace of manufacturing improvement. SMIC is expanding 7nm capacity from 45,000 wafers per month in late 2025 to 80,000 by 2027. But yield improvement is not guaranteed. Without EUV, the process is stuck at a fundamental disadvantage.
The roadmap depends on a steady improvement in yield that the physics of DUV multi-patterning may not deliver. If yields stay at 30%, the cost structure remains prohibitive. If they climb to 50%, the economics improve significantly. The report does not provide a yield projection, and that absence is telling.
The Takeaway: A Tale of Two Markets
Huawei is not a global competitor. Not yet. It is a domestic champion with a fortress around its home market. The 50% share in China is a real achievement, built on policy support, ecosystem development, and a structural shift away from Nvidia. But the 4% global share is the number that matters for long-term relevance.
The HBM bottleneck is the immediate crisis. The yield ceiling is the medium-term constraint. The customer concentration is the structural vulnerability. Any one of these could derail the 2026 revenue target.
The most likely scenario is a continued bifurcation. Huawei dominates China, Nvidia dominates the world. The question for 2027 is whether Huawei can break out of its domestic fortress. The answer will be written not in marketing slides, but in the yield reports from SMIC and the HBM shipment data from CXMT.
Code is truth. The code of the Ascend 950PR is a marvel of constrained design. The truth is that it is built on a foundation that cannot scale to global relevance. The next two years will determine whether this is a temporary gap or a permanent ceiling.