The data shows a 40% efficiency gap that no policy directive can close. Beneath the announcement of China's 2028 plan to train frontier AI models on domestic hardware lies a stack trace of unresolved system-level faults. The silicon whispers beneath the cryptographic surface, but the real story is in the interconnect fabric, not the TFLOPS. Tracing the gas leaks in the 2028 compute pipeline reveals a familiar pattern: hardware catching up, but the system architecture lagging by a generation.
China's stated goal—training frontier AI models exclusively on domestic chips by 2028—is not a hardware problem. It is a systems engineering problem disguised as a semiconductor initiative. The single-card specs are competitive. The cluster story is not. And the software ecosystem, the silent tax on every foreign architecture, remains the unquantified liability in the national balance sheet.
My analysis, based on public chip benchmarks and industry leak data, suggests the 2028 target is achievable only if the definition of "frontier" is retrofitted to match the hardware's actual capabilities. The code remembers what the auditors missed: the gap between a working demo and a production-grade training run is measured in months, not policy cycles.
The Hardware Mirage
Huawei's Ascend 910B delivers approximately 320 TFLOPS in FP16, marginally edging out the A100's 312 TFLOPS. The upcoming 910C is projected to reach 70-80% of H100 performance. Cambricon's Siyuan 590 approaches A100 efficiency in training scenarios. On paper, the single-card gap is closing faster than most international observers anticipated.
This is the narrative the official channels push. It is also the least relevant metric for frontier model training.
A GPT-4 class model required roughly 10^25 FLOPs in 2024. By 2028, frontier training runs will demand 10^26 to 10^27 FLOPs. This is not a linear scaling problem. It is an exponential one that punishes every inefficiency in the stack. The single-card performance is the entry ticket. The cluster efficiency determines whether you actually get to play.
The Interconnect Bottleneck
NVIDIA's NVLink and NVSwitch provide 900GB/s+ of interconnect bandwidth between GPUs, paired with InfiniBand for node-to-node communication. Huawei's HCCS offers approximately 400-500GB/s, using RoCE (RDMA over Converged Ethernet) for cluster networking. This bandwidth differential is not a minor spec sheet footnote. It is the primary constraint on scaling efficiency.
Industry estimates place domestic cluster linear scaling efficiency at 70-85% of NVIDIA's equivalent. The 2028 target requires at least 90% efficiency to be competitive. That gap—the difference between 70% and 90%—is the entire ballgame. It represents months of training time wasted, higher failure rates, and fundamentally different economics for frontier-scale runs.
Based on my audit experience with distributed systems, I can state this plainly: interconnect bandwidth is the difference between a research cluster and a production training facility. The Chinese ecosystem has not yet demonstrated it can bridge this gap at the 10,000-card scale, let alone the 100,000-card scale that frontier models will require.
The CUDA Tax
Hardware specifications are public. Software ecosystems are not. This is the hidden variable in every national AI strategy.
CUDA is not just a programming model. It is a decade of accumulated optimization, a library of battle-tested kernels, and a developer community that has internalized its idioms. The PyTorch and TensorFlow integrations are native. The distributed training libraries—Megatron-DeepSpeed, FSDP—are optimized for NVIDIA's memory architecture and communication primitives.
Huawei's CANN platform and MindSpore framework are improving. The Ascend community claims over 2 million developers. But developer count is not ecosystem maturity. The operator libraries are thinner. The distributed training optimizations are less refined. The debugging tools are less mature. Every one of these gaps translates into engineering hours, and engineering hours are the most expensive resource in AI development.
The migration cost from CUDA to CANN is not a one-time expense. It is a recurring tax on every new model architecture, every novel training technique, every optimization that the NVIDIA ecosystem gets first. This is the silent inefficiency that never appears in government white papers.
The MFU Gap
Model FLOPs Utilization (MFU) is the metric that matters. It measures what fraction of theoretical peak compute is actually achieved during training. NVIDIA clusters achieve 50-60% MFU on frontier-scale runs. Domestic clusters, by industry estimates, achieve 30-40%.
This is not a minor difference. It means that a domestic cluster with the same nominal hardware specifications delivers only 60-70% of the effective compute of an equivalent NVIDIA cluster. To train the same model, you need 40-50% more hardware, more power, more cooling, more floor space, and more time.
The MFU gap is the aggregate result of every system-level deficiency: interconnect bandwidth, software optimization, fault tolerance, checkpoint efficiency, and scheduling algorithms. It is the honest accounting of where the Chinese ecosystem actually stands. And it is the number that no policy announcement can change overnight.
The HBM Supply Chain Risk
The most underreported vulnerability in the Chinese AI hardware strategy is not the chip itself. It is the memory.
High Bandwidth Memory (HBM) is a critical component for AI training. Huawei's Ascend chips rely on HBM2E and HBM3, primarily sourced from Samsung and SK Hynix. Both are subject to US export controls. Domestic HBM production, led by ChangXin Memory Technologies (CXMT), is in early stages. The gap between early-stage production and the yield rates required for mass deployment is measured in years, not quarters.
This is the supply chain equivalent of a smart contract with an unverified external dependency. The chip design might be sound. The system architecture might be functional. But if the memory supply is cut, the entire stack fails. The code remembers what the auditors missed: the dependency graph is the attack surface.
The 2028 Reality Check
What will 2028 actually look like? The most probable outcome is a domestic ecosystem that can train models at the level of current-generation frontier systems—not the frontier of 2028. This is not failure. It is the difference between "available" and "optimal." The Chinese plan is designed to achieve availability, not superiority.
The strategic logic is sound. A domestic ecosystem that can train GPT-4 class models, even with 30-40% lower efficiency, provides strategic autonomy. It breaks the NVIDIA monopoly. It creates a parallel ecosystem that can improve over time. It establishes the foundation for "compute sovereignty" as a global policy concept.
But the technical reality is that the 2028 target will likely be met with a redefined "frontier." The definition will be adjusted to match the hardware's actual capabilities. This is not cynicism. It is the standard pattern of large-scale technology programs: the goal is fixed, the metrics are flexible.
The Contrarian Angle: The Real Bottleneck Is Not Silicon
The conventional analysis focuses on chip performance, manufacturing process, and export controls. The contrarian view is that the binding constraint is not the hardware at all. It is the software ecosystem and the organizational capability to operate at frontier scale.
Training a frontier model is not a hardware exercise. It is an organizational one. It requires coordinating thousands of engineers, managing petabytes of data, debugging distributed systems at scale, and iterating on training runs that cost millions of dollars each. This operational capability is not captured in chip specifications. It is built through years of experience, through failures, through the accumulation of institutional knowledge.
The Chinese ecosystem has demonstrated capability at the 1,000-card scale. The jump to 10,000 cards is not 10 times harder. It is 100 times harder. The failure modes change. The debugging complexity explodes. The operational discipline required is qualitatively different.
This is the gap that no amount of policy support can close. It is closed only through operational experience, through running large-scale training jobs, through making mistakes and fixing them. The 2028 timeline may be sufficient for hardware development. It is likely insufficient for organizational capability development.
The Global Repercussions
The Chinese plan will reshape the global AI landscape regardless of whether it fully succeeds. The mere existence of a credible domestic alternative to NVIDIA changes the competitive dynamics.
NVIDIA's China revenue, which accounted for 20-25% of total revenue in 2023, will continue to decline. The company will pivot to other markets—the Middle East, Southeast Asia, Europe—and invest in customized chips for the Chinese market within export control boundaries. The pricing power that NVIDIA has enjoyed will face gradual erosion as alternative supply emerges.
The "compute sovereignty" concept will spread. Other countries, particularly those affected by US export controls, will study the Chinese model. The global AI ecosystem will fragment into parallel systems: the NVIDIA/CUDA ecosystem and the domestic/alternative ecosystem. This fragmentation will have long-term consequences for AI innovation, standardization, and governance.
The investment implications are significant. The Chinese AI hardware supply chain—chip design, manufacturing, packaging, equipment, materials, cloud services—will receive sustained policy and capital support. The National Integrated Circuit Industry Investment Fund (Big Fund Phase III) has 344 billion RMB allocated, with AI chips and advanced processes as priority targets. This is a multi-year, policy-backed investment theme.
But the investment thesis carries risks. Valuation bubbles are already forming. Cambricon trades at over 50x price-to-sales, compared to NVIDIA's approximately 25x. The gap between policy-driven expectations and market-validated performance is wide. Investors need to distinguish between companies with real revenue traction and those riding the policy narrative.
The Takeaway
The 2028 target is a political commitment, not a technical specification. The hardware will be ready. The software will be functional. The clusters will be built. But the frontier will have moved. The gap between domestic capability and global frontier will narrow, but it will not close.
This is not a failure. It is the nature of technological catch-up in a domain where the leader is also accelerating. The Chinese plan will achieve "available" capability. It will not achieve "optimal" capability. And that distinction matters for the global balance of AI power.
The real question is not whether China can train frontier models on domestic hardware by 2028. It is whether the operational experience gained in the attempt will create the organizational capability to close the gap by 2032. The hardware is the easy part. The institutions are the hard part. And institutions take longer to build than chips.
Patching the silence between protocol updates: the 2028 plan is not the end of the story. It is the beginning of a longer arc. The code remembers what the auditors missed. The question is whether the next generation of engineers will learn from the audit trail.